An optical semiconductor element, such as a light emitting element and a light receiving element, and a semiconductor element, such as a signal processing computing element, are housed in a semiconductor element package that protects semiconductor elements and connects the semiconductor elements and external wiring.
In a package described in JP H11-214556 A, a plurality of line conductors are formed substantially parallel to one another on an upper surface of a dielectric substrate. A groove having a width of greater than or equal to 0.2 mm and a depth of greater than or equal to ½ of a thickness of the dielectric substrate is provided in the dielectric substrate between the line conductors. Air that intervenes in this groove reduces a capacitance value between the line conductors and reduces electrical interference.
The package described in JP H11-214556 A has a configuration without a dielectric between end portions of the line conductors at an end portion of the dielectric substrate by providing the groove. The reduction in the capacitance value between the line conductors reduces electromagnetic interference. This suppresses adverse effects on signal characteristics. However, if the end portions of the line conductors are weakly coupled together, each of the end portions of the line conductors is coupled to an unspecified conductor such as a line conductor and a ground conductor provided on an external wiring substrate connected to the ground conductor and the line conductor in the vicinity. As a result, an electromagnetic field at the end portions of the line conductors is disturbed. This leads to various failures including an increase in loss due to reflection and penetration and occurrence of electromagnetic interference. This may degrade transmission characteristics of signals transmitted through the line conductors.
A semiconductor element package according to one aspect of the present invention includes a base body, a frame member, and a terminal member. The base body has a plate shape and includes a main surface including a mount region in which a semiconductor element is mounted. The frame member is a rectangular frame member provided on the main surface of the base body so as to surround the mount region and has a notch that penetrates the frame member in a thickness direction between an inner peripheral surface and an outer peripheral surface and that is cut out. The terminal member is bonded to the frame member to cover the notch. The terminal member includes a first dielectric layer, a first wiring conductor, a second wiring conductor, and a second dielectric layer. The first wiring conductor is provided on one surface of the first dielectric layer, has a first end portion electrically connected to the semiconductor element, and has a second end portion electrically connected to external wiring. The second wiring conductor is provided on the one surface of the first dielectric layer on which the first wiring conductor is provided, has a third end portion electrically connected to the semiconductor element, has a fourth end portion electrically connected to the external wiring, and is disposed at an interval between the first wiring conductor and the second wiring conductor. The second dielectric layer covers a central portion of the first wiring conductor and a central portion of the second wiring conductor such that the first end portion and the second end portion of the first wiring conductor as well as the third end portion and the fourth end portion of the second wiring conductor are exposed. The first dielectric layer has a hole provided open in a region of the one surface between the first wiring conductor and the second wiring conductor.
A semiconductor device according to one aspect of the present invention includes the semiconductor element package described above and a semiconductor element mounted in a mount region.
A mounting structure according to one aspect of the present invention includes the semiconductor device described above and an external wiring substrate. The external wiring substrate includes a dielectric substrate, external wiring, and a ground conductor layer. The external wiring is provided on a first surface of the dielectric substrate and electrically connected to the first end portion and the third end portion. The ground conductor layer is provided on a second surface of the dielectric substrate.